Communicating Process Architectures 2007: WoTUG-30 : Proceedings of the 30th WoTUG Technical Meeting, 8-11 July 2007, University of Surrey, Guildford, United KingdomAlistair A. McEwan IOS Press, 2007 - 513 pages This publication deals with Computer Science and models of Concurrency. It particularly emphasizes on hardware/software co-design and the understanding of concurrency that results from these systems. A range of papers on this topic have been included, from the formal modeling of buses in co-design systems through to software simulation and development environments. The book includes a contribution by Professor Sir Tony Hoare, the founding father of the theoretical basis upon which much of the work in this series is based. He shares his new thoughts on fine-grained concurrency. Another important contribution is by Professor David May. He was chief architect for the Transputer and the Occam programming language. The editors trust you will find this publication informative and inspirational. |
Contents
FineGrain Concurrency | 1 |
Communicating Process Architecture for Multicores | 21 |
Lazy Exploration and Checking of CSP Models with CSPsim | 33 |
The Core Language of Aldwych | 51 |
Implementing Integrated Formal Specifications in Concurrent Java | 67 |
A Java Implementation of Rendezvous | 89 |
ConcurrentReactive System Design with Honeysuckle | 109 |
Reality or Illusion? | 119 |
A Process Oriented Approach to USB Driver Development | 323 |
A Native Transterpreter for the LEGO Mindstorms RCX | 339 |
Integrating and Extending JCSP | 349 |
HardwareSoftware Synthesis and Verification Using Esterel | 371 |
Modeling and Analysis of the AMBA Bus Using CSP and B | 379 |
A Step Towards Refining and Translating B Control Annotations to HandelC | 399 |
Towards the Formal Verification of a Java Processor in EventB | 425 |
Advanced System Simulation Emulation and Test ASSET | 443 |
Testing and Sampling Parallel Systems | 149 |
New Mobile Channel and Mobile Process Models | 163 |
A ManytoMany Threading Model for Multicore Architectures | 183 |
Design Principles of the SystemCSP Software Framework | 207 |
PyCSP Communicating Sequential Processes for Python | 229 |
A ProcessOriented Architecture for Complex System Modelling | 249 |
Concurrency Control and Recovery Management for Open eBusiness Transactions | 267 |
trancell An Experimental ETC to Cell BE Translator | 287 |
A Versatile HardwareSoftware Platform for InSitu Monitoring Systems | 299 |
The Office Mapping Factor | 313 |
Development of a Family of MultiCore Devices Using Hierarchical Abstraction | 465 |
Domain Specific Transformations for Hardware Ray Tracing | 479 |
A Reconfigurable SystemonChip Architecture for PicoSatellite Missions | 493 |
Transactional CSP Processes | 503 |
Algebras of Actions in Concurrent Processes | 505 |
Using occampi Primitives with the Cell Broadband Engine | 507 |
SharedMemory MultiProcessor Scheduling Algorithms for CCSP | 509 |
Compiling occam to C with Tock | 511 |
Author Index | 513 |
Common terms and phrases
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